In forming damascene interconnect structures in integrated circuit manufacturing processes, the reliability and mechanical strength of the metal damascene interconnect structures is increasingly critical as the use of low-K dielectric layers proliferates. Increasingly, low-K dielectrics are used in metal damascene interconnects to reduce signal delay and power loss as integrated circuit device critical dimensions are scaled down. A drawback of low-K dielectric materials, which typically include an increased level of porosity, is reduced mechanical strength and adhesion of overlying layers as well as adhesion of the metal filling in a damascene interconnect structure.
The problem of reduced mechanical strength and adhesion can manifest itself in many ways including delamination during subsequent processing steps such as CMP which can exert a delaminating stress, also referred to as stress migration. In addition, thermal mismatch stresses can lead to stress migration including delamination of device layers.
There is therefore a need in the integrated circuit manufacturing art to develop a semiconductor device including metal damascene interconnects that have an improved resistance to stress migration to improve semiconductor device yield and reliability.
It is therefore among the objects of the present invention to provide a semiconductor device including metal damascene interconnects, and a method for forming the same, that have an improved resistance to stress migration to improve semiconductor device yield and reliability, while overcoming other shortcomings of the prior art.